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Information Mathematics Seminar
Seminar information archive ～05/01｜Next seminar｜Future seminars 05/02～
| Date, time & place | Thursday 16:50 - 18:35 118Room #118 (Graduate School of Math. Sci. Bldg.) |
|---|---|
| Organizer(s) | Toshiyuki Katsura |
2024/01/25
16:50-18:35 Room #056 (Graduate School of Math. Sci. Bldg.)
Yasunari Suzuki (NTT)
Design and control of fault-tolerant quantum computer (Japanese)
Yasunari Suzuki (NTT)
Design and control of fault-tolerant quantum computer (Japanese)
[ Abstract ]
To demonstrate quantum computational advantage, we need quantum error-correction technology to reduce effective error rates to a small value. In this talk, we explain methods to fault-tolerantly control encoded logical information and methods to translate practical algorithms to basic operations.
To demonstrate quantum computational advantage, we need quantum error-correction technology to reduce effective error rates to a small value. In this talk, we explain methods to fault-tolerantly control encoded logical information and methods to translate practical algorithms to basic operations.
